Business Description

Overview GSI Technology, Inc. (“GSI” or the “Company”) is a semiconductor company pursuing a two-pronged business strategy. Our growth strategy centers on the commercialization of our proprietary associative processing unit (“APU”) technology, which enables high-performance, low-power, compute-in-memory processing for artificial intelligence, high-performance computing, and search applications at the edge. We fund this development through our established legacy business designing and selling high-speed synchronous static random access memory (“SRAM”) products, primarily for the networking and telecommunications, test and measurement, and military/defense and aerospace markets. We operate under a fabless manufacturing model and are headquartered in Sunnyvale, California, with additional operations in Taiwan and Israel. Our APU family of products delivers in-place associative computing capabilities in a compact, low-power form factor, making them well suited for the expanding market for physical artificial intelligence (“AI”) at the edge. The APU has demonstrated industry-leading time-to-first-token performance in multi-modal vision language models (“VLMs”), a capability that is critical for real-time situational awareness in physical AI applications. We believe this performance advantage, combined with our proven low-power architecture, positions the APU for broad applicability as edge AI adoption accelerates. In addition, we have demonstrated APU use cases in synthetic aperture radar (“SAR”) image processing, fast vector search of very large databases, computer vision, drug 3 Table of Contents discovery, and cybersecurity. Together, these capabilities enable multi-workload processing within size, weight, and power constrained environments. Revenue from our APU line has not been material to date. We remain committed to our established synchronous SRAM business, which generates revenue that supports our APU development. We offer what we believe is the broadest portfolio of high-density, high-performance synchronous SRAM products in the market. These products are used in test and measurement equipment, high-performance networking and telecommunications infrastructure, and military/defense and aerospace applications. We maintain long-term relationships with leading original equipment manufacturer (“OEM ”) customers, including KYEC, Cadence Design Systems, and Nokia. In addition, we serve the military/defense and aerospace markets with radiation-tolerant and radiation-hardened space-grade SRAMs, as well as APU-based solutions for applications such as SAR image processing. We operate under a fabless business model, outsourcing wafer fabrication, assembly, and testing. This model allows us to focus our resources on research and development, product design, and marketing while gaining access to advanced process technologies with modest capital investment and fixed costs . GSI’s fiscal year 2026 net revenue increased by 22% compared to net revenue in fiscal year 2025, reflecting strong SRAM sales to chip design and simulation customers. GSI’s gross margin increased by 5% compared to the prior fiscal year primarily reflecting a favorable mix weighted toward higher-margin SRAM products. We have been awarded four contracts under the U.S. Department of Defense Small Business Innovation Research (“SBIR”) program to develop and demonstrate applications of our APU compute-in-memory architecture for military and space customers. All milestones under these contracts were completed as of March 31, 2026, except for certain amended milestones under the Space Development Agency agreement described below and the US Army xTECH agreement described below. Aggregate payments received under these contracts totaled approximately $557,000 and $1.6 million in fiscal 2025 and 2026, respectively. While these contracts validated the performance of our APU architecture in defense applications, they have not yet resulted in follow-on production contracts or material commercial revenues from the underlying technology. Space Development Agency — SBIR Direct to Phase II (Prototype Agreement) — $2.0 million . Development of next-generation APU2 compute-in-memory integrated circuit for space-based edge processing, including radiation-hardened capability assessment. The agreement was originally valued at $1.25 million and was amended in September 2025 to increase the total award to $2.0 million. All original milestones were completed as of March 31, 2026.…